A Free-Space Optically Locked VCO With Picosecond Timing Jitter in 0.18-μm CMOS

نویسندگان

  • Xuebei Yang
  • Xuyang Lu
  • Aydin Babakhani
چکیده

In this letter, we present a novel receiver for time transfer that achieves picosecond accuracy through a line-of-sight link. The receiver is based on a fully integrated optically locked voltage controlled oscillator (OL-VCO) and is implemented in a commercial CMOS process. The design of optical photodiodes integrated with the OL-VCO is explained in detail. It is demonstrated that in the locked mode, the OL-VCO can be synchronized with a 1.3-GHz RF source through a free-space optical link. The free-space synchronization improves the phase noise of the OL-VCO by 25 dB at 100-Hz offset frequency. It is shown that a time transfer accuracy of picosecond can be achieved over a distance of 1.5 m. This represents more than two orders of magnitude improvement compared with the prior art.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Low-Jitter Area-Efficient LC-VCO Based Clock Generator in 0.13-µm CMOS

This letter presents an ultra low-jitter clock generator that employs an area-efficient LC-VCO. In order to fully utilize the area of the on-chip inductor, the loop filter of a phase locked loop (PLL) is located underneath the inductor. A prototype chip implemented in 0.13 μm CMOS process achieves 105 MHz to 225 MHz of clock frequency while consuming 4.2 mW from 1.2 V supply. The measured rms j...

متن کامل

A PLL Exploiting Sub-Sampling of the VCO Output to Reduce In-band Phase Noise

In this paper, we present a 2.2-GHz low jitter PLL based on sub-sampling. It uses a phasedetector/charge-pump (PD/CP) that sub-samples the VCO output with the reference clock. In contrast to what happens in a classical PLL, the PD/CP noise is not multiplied by N in this sub-sampling PLL. Moreover, no frequency divider is needed in the locked state and hence divider noise and power can be elimin...

متن کامل

A Low Power Consumption Single Stage Source Coupled CMOS Voltage Controlled Oscillator (VCO) Using 0.18 μm CMOS Technolog

This paper present a single stage CMOS Voltage controlled oscillator with a high oscillation frequency and low power consumption. The VCO is a single stage circuit has a low phase noise due to reduced noise sources. The VCO is intended to operate as a frequency synthesizer in a PLL to generate local oscillator frequency (LO) for an acquisition system, providing in-phase/Q-phase outputs. The per...

متن کامل

حلقۀ قفل تأخیر پهن باند با پمپ بار خودتنظیم و بدون مشکل عدم تطبیق

Almost all logic systems have a main clock signal in order to provide a common timing reference for all of the components in the system. Supporting the highest bandwidth data rates among devices requires advanced clock management technology such as delay-locked loops (DLLs). The DLL circuitry allows for very precise synchronization of external and internal clocks. In this paper a low jitter and...

متن کامل

Analysis of Jitter due to Power-Supply Noise in Phase-Locked Loops

Phase-locked loops (PLL) in RF and mixed signal VLSI circuits experience supply noise which translates to a timing jitter. In this paper an analysis of the timing jitter due to the noise on the power supply rails is presented. Stochastic models of the power supply noise in VLSI circuits for different values of on-chip decoupling capacitances are presented first. This is followed by calculation ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2014